Field
The present disclosure relates generally to an interface between a host processor and a peripheral device such as a camera and, more particularly, to multimode operations in which a clock signal is embedded in symbols transferred on a multi-wire shared bus.
Background
The Inter-Integrated Circuit serial bus, which may also be referred to as the I2C bus or the I2C bus, is a serial single-ended computer bus that was intended for use in connecting low-speed peripherals to a processor. The I2C bus is a multi-master bus in which each device can serve as a master and a slave for different messages transmitted on the I2C bus. The I2C bus can transmit data using only two bidirectional open-drain connectors, including a Serial Data Line (SDA) and a Serial Clock Line (SCL). The connectors typically include signal wires that are terminated by pull-up resistors.
Protocols governing I2C bus operations define basic types of messages, each of which begins with a START and ends with a STOP. The I2C bus uses 7-bit addressing and defines two types of nodes: master and slave. A master node is a node that generates the clock and initiates communication with slave nodes. A slave node is a node that receives the clock and responds when addressed by the master. The I2C bus is a multi-master bus, which means any number of master nodes can be present. Additionally, master and slave roles may be changed between messages (i.e., after a STOP is sent).
Original implementations of the I2C bus supported data signaling rates of up to 100 kilobits per second (100 kbps) in standard-mode operation, with more recent standards supporting speeds of 400 kbps in fast-mode operation, and 1 megabit per second (Mbps) in fast-mode plus operation. In some systems and apparatus, however, even higher bandwidths are required to support communications between certain types of devices. For example, mobile communications devices, such as cellular phones, may employ multiple devices, such as cameras, displays and various communications interfaces that consume significant bandwidth. Higher bandwidths may be difficult to obtain when conventional I2C protocols are used to maintain compatibility with legacy devices.
There exists an ongoing need for providing optimized communications on serial interfaces configured as a bus connecting master and slave components within a mobile device.